Appeal No. 1997-1636 Page 2
Application No. 08/204,996
BACKGROUND
The invention at issue in this appeal is a multi-
processor computer architecture for the uninterrupted
processing of a voluminous flow of data. The architecture
comprises substantially identical processing layers. The
layers feature dual-port microprocessors. Each microprocessor
is connected to its layer’s bus by one port and to the next
layer’s bus or an output bus by the other port. Each layer
also includes a supervisory microprocessor. The supervisory
processor is connected to its layer’s bus by one of its ports
and to a supervisory bus by the other port.
Claim 1, which is representative for our purposes,
follows:
1. A multi-processor computing system
comprising:
a plurality of layers, each layer comprising at
least three dual ported processors,
a plurality of busses, each bus supervised by a
supervisory processor;
one of said plurality of busses constituting an
input bus to processors of a first layer and another
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