Appeal No. 97-2892
Application No. 08/274,556
The higher the code chip rate for a particular
system the smaller is multipath problem. With 5-
Mcps codes, for instance, the reflected signal path
must be 200 ft or less, different from the direct
path to have any effect, and as code rate is
increased the path length for which the reflected
signal interferes is further reduced.
Based upon this excerpt from Dixon, the examiner concludes
(Answer, page 6) that:
Dixon clearly suggest[s] the chip rate of 5Mcps (16
PN chips per RW chip), and the rate can be increased
as necessary to further reduce the path length and
interference. With Dixon’s suggestion, it would
have been obvious to one skilled in the art to use
the chip rate of 5Mcps with the Gilhousen et al.
system and increase the chip rate as needed to solve
the multipath problem since the processing gain
discrimination provided by the correlator 526
increases proportionally to the PN chip rate.
Appellants argue (Brief, page 7; Reply Brief, page 2)
that even if Dixon’s teachings are adopted in Gilhousen to set
the code chip rate to make the “multipath problem” smaller,
the modified teachings of Gilhousen would still not have means
for setting the PN chipping rate high enough so that the
“correlators provide processing gain discrimination against
multipath signal components delayed more than a small fraction
of a RW chip duration.” We agree. Although the quoted
excerpt from Dixon clearly teaches adjusting the code chip
rate to make the multipath problem smaller, this limited
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