Appeal No. 1997-4224
Application No. 08/474,866
This is a decision on appeal from the final rejection of
claims 25 through 27, 53, 54, 59 and 68 through 76.
The invention is directed to a multifunctional access
device and method. More particularly, an address translator
receives an address supplied by an address bus of a first
computer and outputs translated addresses to an address bus of
a second computer. The address translator comprises a
register having address segments and a control signal is
provided responsive to detection that the address at address
inputs changes from one segment to another segment.
Representative independent claim 25 is reproduced as
follows:
25. A multifunction access circuit for use with first
and second digital computers each having an address bus for
addresses, the access circuit comprising:
an address translator circuit having address inputs for
addresses supplied by the address bus of the first computer
and outputs for translated addresses to the address bus of the
second computer, the address translator circuit also having
registers establishing address segments, said address
translator circuit responsive to addresses on the address
inputs is [sic, in] the address segments; and
control logic circuitry connected to said address
translator circuit and operative to supply a control signal in
response to detection that the address at the address inputs
changes from one segment to another segment.
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