Appeal No. 99-0717 Page 4
Application No. 08/597,095
processing means consisting of a electronic
engine control microprocessor and program storage
means for storing instructions executable by said
processor, said processing means including:
means responsive to said signal value data
in said data structure for performing a generic
neural network routine for combining selected
signal values to produce and store new signal
values in said data structure in accordance with
said weight values in said data structure, and
output means coupled to said throttle and
responsive to one or more of said new signal
values for controlling the speed of said engine,
and
second output means coupled to said
ignition timing control and responsive to one or
more of said new signals for generating a second
output signal for controlling the ignition
timing of said engine.
The references relied on by the patent examiner in
rejecting the claims follow:
Onari et al. (Onari) 4,899,280 Feb. 6,
1990
Ishii et al. (Ishii) 5,410,477 Apr. 25,
1995.
Claims 1-10 stand rejected under 35 U.S.C. § 103 as
obvious over Ishii in view of Onari. Rather than repeat the
arguments of the appellants or examiner in toto, we refer the
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