Ex parte IWATA - Page 2




          Appeal No. 1997-0201                                                         
          Application No. 08/140,318                                                   


          compression and encoding.  More particularly, Appellant                      
          indicates at pages 14 through 16 of the specification that a                 
          block-matching procedure is utilized for finding a candidate                 
          block within a search range of a previous frame which bears                  
          the strongest resemblance to a reference block in a current                  
          frame.  The motion vector is determined by calculating a                     
          positional shift between the blocks in the current and                       
          previous frames.                                                             
               Claims 4 and 7 are illustrative of the invention and read               
          as follows:                                                                  
          4.  A processing circuit for performing motion detection by                  
          dividing picture-based image signals into blocks, each block                 
          comprising a pre-set number of pixels and for searching for an               
          entire picture utilizing a block-matching method, with the                   
          block size of a reference block of the current picture                       
          comprising M x N pixels and with the number of candidate                     
          blocks of a previous picture being M x N, said circuit                       
          comprising                                                                   
               a plurality of processing units equal in number to the                  
          product M x N, each of said processing units being adapted for               
          calculating an evaluation value based on a difference between                
          a pixel value of said reference block and a pixel value of a                 
          one of said candidate blocks under consideration, said                       
          processing units being arrayed in a M x N matrix                             
          configuration, outputs of said processing units being                        
          connected in a pipeline configuration via a plurality of                     
          additive nodes, the pixel values of said reference block and                 
          the pixel values of said one candidate block under                           
          consideration being processed in a pre-set sequence to thereby               

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