Ex parte IWATA - Page 3




          Appeal No. 1997-0201                                                         
          Application No. 08/140,318                                                   


          detect a motion vector based on the evaluation value of said                 
          difference.                                                                  
          7.   A processing circuit for performing motion detection by                 
          dividing picture-based image signals into blocks, each block                 
          comprising a pre-set number of pixels and for searching an                   
          entire picture utilizing a block-matching method, wherein the                
          block size of a reference block of the current picture                       
          comprises M x N pixels and the number of candidate blocks of a               
          previous picture being M x N, said circuit comprising:                       
               a plurality of processing units equal to the product of M               
          x N, each of said processing units being adapted for                         
          calculating an evaluation value based on a difference between                
          a pixel value of said reference block and a pixel value of a                 
          one of said candidate blocks under consideration, and for                    
          summing said evaluation values, said processing units being                  
          arrayed and interconnected in an M x N matrix configuration,                 
          the pixel values of said reference block and the pixel values                
          of the candidate block under consideration being input to said               
          processing units in a pre-set sequence to thereby detect a                   
          motion vector;                                                               
               wherein each picture is a frame and wherein each                        
          processing unit comprises:                                                   
               a register for sequentially storing the pixel values of a               
          current frame,                                                               
               a multiplexer for multiplexing pixel values of an odd                   
          column of a previous frame which is under consideration with                 
          the pixel values of an even column of the previous frame which               
          is under consideration,                                                      
               a processor for calculating an absolute value of the                    
          difference between an output of said register and an output of               
          said multiplexer, and                                                        
               an accumulator for accumulating outputs of said processor               
          for summing the absolute values of the differences.                          

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