Appeal No. 1997-0416
Application No. 08/125,406
CLAIMS 5, 6, 9-13, 19 AND 20.
With respect to claim 9, Appellants argue that Smith does not remedy the
deficiency in the above combination. (See brief at pages 10-11.) We agree with
appellants. Again, the examiner is brief in his discussion of and citations to the applied
prior art teachings of Smith. (See answer at page 6.) From our review of Smith, Smith is
concerned with power management which is controlled by the CPU 12 and power
manager (PMGR) 11. We find no disclosure in Smith which teaches or suggests that the
peripherals request that the peripheral bus clock be restarted. Smith generally discloses
three modes of operation of the computer 10 and monitoring by the PMGR. (See Smith at
columns 7 and 8.) Smith discloses that the PMGR monitors lines 37 such that any input
from the I/O controller will wake the computer from the sleep state. (See Smith at column
8, lines 21-23.) Clearly, Smith does not disclose the I/O transmitting a request to wake the
computer, but rather that the computer monitors to determine when to stop and restart
power or clocks within the system using switches 26 and clock control 27 to wake and
resume operation. Therefore, Smith does not remedy the deficiency in the combination of
the admitted prior art, Herrig and Murphy. Hence, we cannot sustain the rejection of claim
9 and dependent claims 5, 6, 10-13, 19 and 20.
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