Appeal No. 1997-1351
Application 08/127,924
at least one control processor system including a
control processor processing time critical tasks such
as real-time tasks; and
at least one additional remainder processor system
which is separate from the control processor system and
includes a remainder processor processing tasks which
are not time critical;
wherein the bus system includes a control bus and
a remainder bus, the control bus being connected to the
control processor system, and the remainder bus being
connected to the remainder processor system; and
wherein the plurality of peripheral devices are
connected to both the control bus and the remainder
bus.
The Examiner relies on the following prior art:
Matsumoto 4,065,809 December
27, 1977
Kagawa 4,495,569 January 22,
1985
De Kelaita et al. (De Kelaita) 4,713,758 December 15,
1987
Sackmann et al. (Sackmann) 5,131,092 July 14,
1992
Petty 5,222,213 June 22,
1993
(filed April 10,
1990)
Claims 19-45 stand rejected under 35 U.S.C. § 112,
second paragraph, as being indefinite for failing to
particularly point out and distinctly claim the subject
matter which applicants regard as their invention.
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