Appeal No. 1997-1755
Application 08/163,447
The disclosed invention relates to a semiconductor
assembly for providing a plurality of clock-responsive
semiconductor devices, most specifically synchronous memory
devices, in a packaging arrangement such that the timing of
both the data in and data out of the package provides the
highest level of confidence of accuracy with respect to time.
For semiconductor devices providing a common function on a
single package, it is important that common signals reach the
individual devices as close to simultaneously as possible.
The invention achieves this objective of providing minimal
distortion of clock input signals to each of a plurality of
memory modules by incorporating a resistor (fixed impedance)
connected, as an example, between the package assembly side of
connector 15 and the memory module 12 on the semiconductor
package 10 (figure 8A).
Claim 1 is reproduced below as illustrative of the
invention.
1. A semiconductor assembly comprising:
a plurality of semiconductor devices each responsive to a
clocking signal applied to the device via at least one clock
input lead associated with said device;
a packaging assembly for supporting said plurality of
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