Appeal No. 1997-3133 Page 2
Application No. 08/370,076
The invention pertains to boundary scan testing and, in
particular, is directed to a post-mission test method for
assuring the integrity of the boundary scan test. The
integrity of the scan path is checked after test execution but
before test diagnosis. By comparing the bit length of the scan
path before execution of the mission test with the bit length
of the scan path after test execution, the integrity of the
scan path is checked. If the bit length of the scan path has
changed, the mission test is known to be invalid and a test
technician’s time is not wasted trying to diagnose and repair a
circuit board, which may be working properly, because of
erroneous test results.
Representative independent claim 13 is reproduced as
follows:
13. A boundary scan testing method for performing a
mission test on a circuit under test formed by a plurality of
interconnected integrated circuit (IC) chips, each chip having
internal logic and a boundary scan circuit, wherein the
plurality of boundary scan circuits are interconnected to form
a scan path, and confirming the integrity of the mission test
after the mission test has been performed, comprising the steps
of:
executing the mission test on the circuit under test,
wherein the scan path has a pre-test configuration;
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