Appeal No. 1997-3156
Application No. 08/372,423
“predetermined value,” as claimed, of a phase delay at which the operating frequency of
the integrated circuit is changed. In short, without resorting to pure speculation, there is
nothing in Swapp which suggests the changing of an operating frequency of the DUT when
a voltage level of an integrated signal indicates that the phase delay between the output
signal of the DUT and a clock signal is longer than a predetermined value.
Accordingly, the examiner’s decision rejecting claims 24, 26, 28-30 and 32 under
35 U.S.C. § 103 is reversed.
REVERSED
ERROL A. KRASS )
Administrative Patent Judge )
)
)
) BOARD OF PATENT
MICHAEL R. FLEMING ) APPEALS AND
Administrative Patent Judge ) INTERFERENCES
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)
PARSHOTAM S. LALL )
Administrative Patent Judge )
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