Ex parte HORSTMANN et al. - Page 9




          Appeal No. 1997-3241                                                        
          Application 08/442,726                                                      


               The term “ripple counter” is not defined in the                        
          specification.  However, figure 11 of the specification                     
          provides the schematics of a ripple counter.  On page 4 of the              
          brief, Appellants describe a ripple counter as a counter where              
          the least significant bit is updated first, then the next                   
          significant bit, and so on until all the bits of the counter                
          have been updated to reflect the incrementation.  Thus, it                  
          takes several clock cycles until all bits of the counter                    
          reflect the incremented value.  This description is consistent              
          with the operation of the counter and comparator described on               
          page 16 of Appellants' specification, which identifies that                 
          the comparator uses the low order bits of the counter while                 
          the higher order bits are incrementing.  Further, this                      
          definition of a ripple counter is consistent with the known                 
          meaning in the art as is evidenced by Moyer who discloses in                
          column 1, lines 28-51 and column 4, line 36 to column 5 line                
          11, that a ripple counter is one where the first bit is                     
          clocked then the output of the first bit clocks the next bit,               
          and so on.  Thus, we find that the limitation of a ripple                   
          counter should be given its normal meaning in the art, a                    
          counter in which the least significant bit is incremented                   
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