Appeal No. 1997-3426
Application 08/373,052
determining if the packet is intended for the first
node; and if so
storing the packet within the first node;
transmitting the packet from the first node to a
next node; and
while the step of transmitting is occurring, and if
the packet was determined to be intended for the
first node, performing in the first node an
operation specified by the packet, wherein at least
one received packet causes a portion of the other
circuitry to assume control of at least some of the
data processor signal lines for executing a function
specified by the packet.
The Examiner relies on the following prior art:2
Underwood et al. (Underwood) 4,181,940 January 1,
1980
Lamport et al. (Lamport) 5,138,615 August 11,
1992
(filed June 22, 1989)
Awiszio et al. (Awiszio) 5,193,149 March 9,
1993
(filed October 8, 1991)
Douglas et al. (Douglas) 5,333,268 July 26,
1994
(effective filing date October 3, 1990)
The Examiner also cites Schroeder et al., U.S. Patent2
5,088,091, and Chang et al., U.S. Patent 5,367,643, in the
list of Prior Art of Record (Examiner's Answer, pages 2-3).
The references are not applied in any of the rejections. The
listing of prior art in an Examiner's Answer should be limited
to the references relied on in the rejections on appeal. See
Manual of Patent Examining Procedure § 1208.
- 3 -
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 Next
Last modified: November 3, 2007