Ex parte HARDEE - Page 8




          Appeal No. 1997-3436                                       Page 8           
          Application No. 08/432,884                                                  


          are on or off.  Furthermore, the figure cited by the examiner               
          shows that neither of the data input/output lines is connected              
          to the respective gates of the transistors 14 and 15.  Fig. 3.              
          In other words, the gates of the transistors are not shown to               
          receive any data signals.                                                   


               Data write n-channel MOS transistors 14 and 15 possibly                
          could be interpreted as being write driver circuits; however,               
          the transistors could also be interpreted as pass transistors.              
          The examiner does not contest that appellant’s definition that              
          “[a] pass transistor simply (selectively) passes a voltage                  
          from one node to another.  On the other hand, a driver circuit              
          drives an output high or low.”  (Appeal Br. at 20.)  The                    
          examiner’s assertion that transistors 14 and 15 “transmit the               
          information on the data input/output lines DQ-DQ to the bit                 
          lines BL-BL,” (Examiner’s Answer at 4), is consistent with the              
          appellant’s definition of a pass transistor, which would mean               
          that transistors 14 and 15 are pass transistors rather than                 
          write driver circuits.                                                      










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