Appeal No. 1997-4024
Application No. 08/299,407
1. A method of manufacturing a thin film capacitor
comprising the steps of:
depositing an interlayer insulating film on a
semiconductor substrate;
forming one or more contact holes at a desired position
of said interlayer insulating film;
depositing a polysilicon layer to embed said contact
hole(s);
flattening a surface of said polysilicon layer by
chemical and mechanical polishing using at least one of
piperazine and colloidal silica slurry; and
depositing on the flattened polysilicon layer a barrier
metal film, a dielectric thin film having a high dielectric
constant and an electrically conductive film for an upper
electrode and then processing those films to have a desired
size.
The examiner relies upon the following reference as
evidence of obviousness
Yamamichi et al. 5,332,684 July 26, 1994
(Yamamichi)
Appellants' claimed invention is directed to a method of
making a thin film capacitor wherein a polysilicon layer is
embedded in the contact holes of an interlayer insulating
film. The polysilicon layer is flattened by chemical and
mechanical polishing using one of piperazine and a colloidal
silica slurry. According to appellants, the conventional way
for flattening a polysilicon layer is to use a dry etching
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