Ex parte SEZNEC - Page 4




          Appeal No. 1998-1506                                                        
          Application No. 08/302,695                                                  


          for a plurality of columns in his cache."  Further, appellant               
          adds (Brief, page 9) that in Melton's system, one mapping law               
          is used for all of the columns (or banks), and "a particular                
          main memory address is transformed into the same local address              
          in each of Melton's columns."  We agree.  Melton uses a single              
          mapping matrix as exemplified in Figure 6 regardless of the                 
          column or bank.  Therefore, a single mapping function is used               
          for all cache memory banks.                                                 
               The examiner seems to admit that Melton fails to disclose              
          a different mapping law for each bank by stating (Answer,                   
          pages 6-7) that "it would have been obvious ... to improve CPU              
          utilization ... by maximizing the useful data or instructions               
          that remain in the cache by reducing thrashing by creating                  
          [sic, or] using different mapping algorithms."  Yet, the                    
          examiner provides no support for a conclusion that plural                   
          mapping laws would have been obvious.  Further, the examiner                
          asserts (Answer, page 8) that Melton's mapping function is                  
          different because "the matrix multiply is performed on                      
          different bits of the address."  In other words, the examiner               
          apparently believes that if each bit is multiplied by a                     
          different number, then there are plural mapping functions.                  
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