Ex parte FUNK et al. - Page 2




               Appeal No. 1998-1516                                                                                                  
               Application 08/420,540                                                                                                


               claims pending in the case.                                                                                           



                       The invention pertains to cache management mechanisms in a computer system.  More                             

               particularly, the cache management mechanism of the instant invention intelligently places preload                    

               instructions into the instruction stream of a computer system such that, through identification of certain            

               instruction stream constructs, the cache memory gets the right information at the right time.  These                  

               instruction stream constructs, or predictor constructs, are used to predict the presence of two other                 

               stream constructs, the first instruction stream construct predicted involving the loading of an address               

               (address generation construct), and the second instruction stream construct predicted involving the use               

               of the generated address to gain access to the associated information (data load construct).                          



                       Representative independent claim 1 is reproduced as follows:                                                  

                       1.  A computer apparatus, said computer apparatus comprising:                                                 

                       a first central processing unit, said first central processing unit executing an instruction stream,          
               said instruction stream having a first preload instruction inserted therein, said first preload instruction           
               having been inserted by a compiler at a location proximate to a first predictor construct contained in                
               said instruction stream, said first preload instruction containing a first address for first information that         
               will be needed by said first central processing unit.                                                                 

                       The examiner relies on the following reference:                                                               

                       Schlansker et al. (Schlansker)         5,404,484               Apr. 4, 1995                                   
                                                                      (filed Sep. 16, 1992)                                          

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