Ex parte SHIPPY et al. - Page 7




          Appeal No. 1998-1802                                                        
          Application 08/245,786                                                      


          The examiner points to the “INT” signal of Lange as meeting                 
          the stop memory operation signal.  Although the “INT” signal                
          does stop operation of the memory controller, this signal is a              
          function of the “MATCH” signal output from comparator 29.  The              
          “MATCH” signal indicates a determination that desired                       
          information is in the cache.  Claims 1 and 11 would require                 
          that signals “MATCH” and “INT” be generated concurrently and                
          directly from the cache controller to the memory controller.                
          These two signals are not generated concurrently.  Lange                    
          states that the “match signal is generated between the time                 
          the strobe address register signal SAR is generated and the                 
          time that an interrupt signal INT is to be generated by the                 
          interrupt generator 16" [column 8, lines 16-19].  Thus,                     
          signals MATCH and INT are clearly not concurrent as required                
          by independent claims 1 and 11 nor is the stop memory                       
          operation signal in Lange sent directly from the cache                      
          controller to the memory controller.                                        
          The examiner has also cited a per se rule that                              
          shifting the location of parts is not patentable [answer, page              
          6].  Examiners should avoid the application of such per se                  
          rules without considering the particular facts of each case.                
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