Ex parte POPAT - Page 4


                   Appeal No. 1998-3424                                                                                             
                   Application No. 08/315,792                                                                                       

                   power consumption because cell locations are continuously powered up and enabled for                             
                   read or write operation.                                                                                         
                           Further, regardless of appellant’s arguments regarding dissimilar problems and no                        
                   disclosure by the references of the “affirmative steps taken to prevent the transitions” in                      
                   the instant invention, Ward clearly discloses the invention as broadly set forth by the                          
                   instant claims.  For example, claim 1 calls for  controlling the output “so no transition                        
                   occurs…when a read command is supplied to the device without a write command being                               
                   supplied to the device.”  Ward, at the identified portion of column 8, clearly meets this                        
                   claim language in that the read clock generator 82 is disabled until at least one write                          
                   operation occurs.  This portion of Ward similarly meets the language of instant claim 5                          
                   since  no transition occurs at the output in response to a command for erasing all entries                       
                   in the device [Note  lines 52-54 of column 8 of Ward which discloses that the empty                              
                   condition prevents further read./write pulses.].  In a similar manner, since independent                         
                   claim 8 recites an output control responsive to either one of the conditions of claims 1                         
                   and 5, claim 8 is met by Ward.  Claim 13 is also met for similar reasons.                                        
                           With regard to claim 17. Appellant argues [brief-page 11] that neither of the                            
                   references talks about setting the write pointer value to equal the stored reader pointer                        
                   value after reading a last unread value in response to reception of a read command if the                        
                   read command is received without a corresponding reception of the write command.                                 
                   However, Ward, for example, recites that the reset signal sets both pointers to the same                         
                   address [column 8, lines 55-56] and this is apparently done after reading the last unread                        
                   value, i.e., an empty condition.                                                                                 




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