Appeal No. 2000-0372
Application No. 08/421,338
Appellants contend that the function of Stewart’s RAM TABLES 8 is identical to
the control block storage in the upper portion of memory 24-A of the instant application but
is unrelated to the cascaded memories disclosed and claimed by appellants. The
cascaded memories are used to sequentially provide a plurality of addresses, the last one
identifying the location of the control block in the upper portion of memory 24-A which
includes the corresponding value. Appellants disagree with the examiner that Stewart
teaches a cascaded memory as a CAM to map between logical and physical addresses
and that the RAM table of Stewart is functionally equivalent to the cascaded RAM [principal
brief-page 6]. Appellants also question how or why artisans would have modified anything
in Stewart with the teachings of Dujari.
We agree with appellants that there is nothing in Stewart that would indicate that
Stewart’s RAM table is “functionally equivalent” to the claimed cascaded random access
memories. The telling error in the examiner’s position is brought out by the examiner’s
response to appellants’ argument, at page 6 of the answer. The examiner states thereat
that “Stewart teaches a content addressable memory (CAM) which performs the same
function as the claimed cascaded random access memory, storing data. Therefore, the
Examiner contends that the CAM is an equivalence as the cascaded random access
memories.”
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