Ex parte AZUMA et al. - Page 16




          Appeal No. 1998-1578                                                        
          Application No. 08/543,827                                                  


          semiconductor.”  (Column 5, lines 26-29.)  According to Ho,                 
          this process involves annealing the TiN layer at a temperature              
          range of 300EC to 650EC for greater than 80 minutes.  (Column               
          6, lines 57-66.)  It is important to note that Ho does not                  
          place any particular restriction on the thickness of the                    
          barrier layer.  The appellants acknowledge as much.  (Appeal                
          brief, page 9.)  Thus, it follows that Ho’s improved process                
          applies to any typical prior art TiN barrier layer.                         
               From these facts, we determine that one of ordinary skill              
          in the art would have found it prima facie obvious to modify                
          the processes described in either Larson or Scott by annealing              
          the TiN barrier layer at 300EC to 650EC for greater than 80                 
          minutes using Ho’s “atmospheric furnace” process, thus                      
          arriving at a                                                               
          method encompassed by appealed claims 1 or 14, with the                     
          reasonable expectation of obtaining all of the advantages                   
          described in Ho including the prevention of spike formation or              
          metal diffusion into the substrate.  Any of the annealing                   
          temperatures described in Ho is encompassed by appealed claims              
          1 or 14.                                                                    


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