Appeal No. 1998-2918
Application No. 08/508,874
BACKGROUND
The invention is directed to a method for forming an isolation structure on a SOI
(Silicon on Insulator) substrate. Claim 1 is reproduced below.
1. A method for fabricating a reduced stress isolation structure for a SOI
device comprising the steps of:
providing a semiconductor substrate having a buried region of silicon
dioxide below a major surface and a silicon layer below the major surface and
above the buried region of silicon dioxide, wherein the silicon layer has an edge;
disposing a first layer on the major surface;
disposing a second layer overlying the first layer, wherein the second
layer has a first portion and a second portion;
disposing a third layer overlying the second layer, wherein the third layer
has a first portion and a second portion;
removing the first portion of the third layer;
removing the first portion of the second layer;
oxidizing the semiconductor substrate to form an isolation structure, a
portion of the isolation structure protrudes above the major surface of the
semiconductor substrate and is overlying the edge of the silicon layer;
removing the second portion of the third layer; and
removing the second portion of the second layer.
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