Appeal No. 1998-3411 Application No. 08/548,113 However, the above language in claim 1 of Bederman is not a teaching that either processor 5 or 6 can become temporarily a master processor such that processor 5 can access either memory 2 or 4 in addition to its own memory 3 or that processor 6 can access either memory 2 or 3 in addition to its own memory 4. To the contrary, in his ABSTRACT Bederman specifically teaches that two of the three processing units can access its own memory but not any other memory. Whereas claims 12 and 13 dependent from claim 11, and we will not sustain the rejection of claim 11 over Persaud and Bederman as stated above, we will not sustain the rejection of claims 12 and 13 under 35 U.S.C. § 103 as obvious over Persaud, Bederman and Hughes. REVERSED STANLEY M. URYNOWICZ JR. ) Administrative Patent Judge ) ) ) ) BOARD OF PATENT ERROL A. KRASS ) APPEAL AND Administrative Patent Judge ) INTERFERENCES ) ) ) MICHAEL R. FLEMING ) Administrative Patent Judge ) 4Page: Previous 1 2 3 4 5 NextLast modified: November 3, 2007