Appeal No. 1999-0382
Application 08/436,133
We reverse.
BACKGROUND
The disclosed invention relates to an interconnect structure
for a semiconductor integrated circuit in which the top
dielectric layer has voids.
Claim 1 is reproduced below.
1. A contact structure on a semiconductor integrated
circuit, comprising:
a conductive element;
a first dielectric layer overlying said conductive
element;
a second dielectric layer overlying said first
dielectric layer;
a third dielectric layer overlying said second
dielectric layer, said third dielectric layer containing
voids which allow a chemical wet etch to pass through said
third dielectric layer to said second dielectric layer,
wherein said second dielectric layer is made of material
having a slower etching speed than said third dielectric
layer;
an opening through said first, second and third
dielectric layers to expose a portion of said conductive
element; said opening having an upper portion and a lower
portion wherein the upper portion of said opening is the
result of a chemical wet etch;
a second conductive element overlying portions of said
third dielectric layer and extending into said opening;
wherein said second conductive element makes electrical
contact with said first conductive element.
The Examiner relies on the admitted prior art (APA) of
Appellant's figures 1 and 2 and on the following prior art:
Koyama et al. (Koyama) 5,200,808 April 6, 1993
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