Appeal No. 1999-0892
Application No. 08/630,128
specific orientation, designated as [011], permits drain current
to run along the crystal orientation designated as [01(-1)].
Appellants assert at page 6 of the specification that this
particular gate orientation provides improved linearity of
transfer conductance and an improved strain characteristic.
Claim 1 is illustrative of the invention and reads as
follows:
1. A field effect transistor comprising:
(a) a semi-insulating GaAs substrate;
(b) a step-doped structured active layer including an n
type GaAs layer formed on said substrate, and an n-type GaAs
layer or a non-doped GaAs layer formed on said n type GaAs
layer, said n– type GaAs layer or non-doped GaAs layer being
formed with at least one recess; and
(c) a gate electrode formed in said recess so that said
gate electrode is oriented in such a direction that drain
current runs in said active layer along crystal orientation
[01(-1)].
The Examiner relies on the following prior art:
Onodera et al. (Onodera) 4,791,471 Dec.
13,
1988
Willer 4,889,827 Dec. 26,
1989
R. E. Williams (Williams), “Graded Channel FET’s: Improved
Linearity and Noise Figure”, IEEE Transactions on Electron
Devices, Vol. ED-25, No. 6, 600-05 (June 1978).
2
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