Appeal No. 1999-1126 Page 3
Application No. 08/722,486
sensing amplifier having a pair of input terminals
connected to a pair of bit lines, said differential
current sensing amplifier having a pair of input
transistors connected to said bit line pair and
means for biasing said input transistors into
conduction, and wherein neither of said input
transistors is cut off during reading or writing
access to said memory.
The references relied on in rejecting the claims follow:
Sasaki et al. (Sasaki) 5,126,974 June 30,
1992
(filed Jan. 16, 1990)
Nogle et al. (Nogle) 5,229,967 July 20,
1993
(filed Sep. 4, 1990)
Taguchi 5,339,273 Aug. 16,
1994
(filed Dec. 13, 1991).
Claims 4, 5, 12, and 13 stand rejected under 35 U.S.C. §
102(e) as anticipated by Taguchi. Claims 4, 12, and 13 stand
rejected under § 102(e) as anticipated by Sasaki or Nogle.
Claim 5 stands rejected under 35 U.S.C. § 103(a) as obvious
over Sasaki or Nogle. Rather than repeat the arguments of the
appellants or examiner in toto, we refer the reader to the
brief and answer for the respective details thereof.
OPINION
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