Ex parte PARANJPE - Page 2




             Appeal No. 1999-1655                                                                                  
             Application No. 08/722,904                                                                            


                                                 BACKGROUND                                                        

             The appellant's invention relates to an integrated circuit interconnect.  The invention               
             uses ion implantation and annealing to encapsulate the vertical sidewalls of a clad metal             
             structure or trench in a dielectric material.   An understanding of the invention can be              
             derived from a reading of exemplary claims 1 and 3, which are reproduced below.                       
                    1.     A method of encapsulating clad metal structures in an integrated                        
                    circuit, comprising the steps of:                                                              
                           (a) providing a partially formed integrated circuit with a clad metal                   
                    structure including a first metal structure and a cladding metal on a top                      
                    horizontal surface of the first metal; and                                                     
                           (b) implanting dopants into exopsed [sic; exposed] first metal vertical                 
                    sidewalls of said clad metal structure to form vertical surface regions of first               
                    metal-dopant mixtures.                                                                         

                    3.     A method of encapsulating metal structures in an integrated circuit,                    
                    comprising the steps of:                                                                       
                           (a) providing a partially formed integrated circuit with a dielectric layer             
                    including trenches;                                                                            
                           (b) implanting dopants into surface regions of sidewalls of said                        
                    trenches;                                                                                      
                           (c) filling said trences [sic; trenches] with metal to form metal                       
                    structures with said dopants adjacent said metal structures; and                               
                           (d) after said filling with metal, annealing said metal structure and                   
                    dielectric with said implanted dopants to form metal surface regions of                        
                    metal-dopant compounds.                                                                        


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