Ex parte ZDEPSKI et al. - Page 11




          Appeal No. 1999-2306                                                        
          Application 08/639,284                                                      


          sequence of I-frames would include these matrices.                          
          We agree with appellants.  As noted above, Lane                             
          discloses nothing about how to extract the I-frames from the                
          normal bitstream and how to assemble these I-frames in                      
          sequence.  The admitted prior art in Lane does not indicate                 
          that matrices are to be located and assembled in forming the                
          I-frames bitstream in the prior art.  Therefore, we do not                  
          sustain the examiner’s rejection of claims 22 and 23.                       
          Claims 24 and 25 are separately argued by appellants.                       
          Since these claims include the decoding and encoding steps as               
          discussed above with respect to claim 1, we do not sustain the              
          examiner’s rejection of claims 24 and 25.                                   
          Claim 28 is separately argued by appellants.                                
          Specifically, appellants argue that Lane does not disclose the              
          recited use of a memory stack to store and retrieve markers                 
          and coordinates in response to finding start codes for data                 
          blocks, extension blocks and I-frame headers.  The examiner                 
          finds that the steps of claim 28 are inherently performed in                
          Lane.  Appellants dispute this finding.                                     
          We agree with appellants.  The disclosure of Lane does                      
          not support the examiner’s findings of anticipation.  Claim 28              
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