Appeal No. 2000-0312
Application No. 08/610,007
Claims 1 through 22 stand rejected under 35 U.S.C. § 103(a)
as being unpatentable over the admitted prior art circuit of
Figure 1 in view of Masuda.
OPINION
We have carefully considered the entire record before us,
and we will reverse all of the rejections of record.
Masuda discloses a circuit (Figure 3) that compensates for
an offset voltage that arises in an operational amplifier 22. A
feedback circuit connected between the output and the input of
the operational amplifier 22 includes a comparator 28, a pulse
signal generating circuit 40, an AND gate 30, an U/D counter 44,
a D/A converter 50, and a voltage to current converter 52. The
examiner acknowledges (answer, page 3) that Masuda “does not
disclose that the inverting input of the amplifier 22 receives
an input signal comprising an AC component and a DC component as
called for in claim 1.” Notwithstanding this deficiency in the
3
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