Ex parte SAIKI et al. - Page 4




              Appeal No. 2000-0373                                                                                            
              Application No. 08/450,245                                                                                      

              obviousness with regard to the instant claimed subject matter.  However, we will sustain                        
              the rejections of claims 3, 4 and 21, under 35 U.S.C. § 103, relying on the combination of                      
              Precourt and Behrens, either in whole or in part.                                                               
                      In applying Noguchi to instant claim 1, the examiner contends that Noguchi teaches                      
              a read/write processor 25 having an interleave write data generator, citing column 2, lines                     
              47-49, a read/write amplifier 27 and a compound circuit, identifying column 2, lines 49-50.                     
              The examiner interprets the parallel-serial converter as being the claimed “compound                            
              circuit” because it restores the interleave data to its original form.  The trouble here is that                
              Noguchi’s parallel/serial converter is not part of the amplifier.  While the examiner                           
              recognizes this, the examiner contends that the parallel/serial converter is connected to the                   
              input of the amplifier and, so, is “functionally equivalent to being a part of the amplifier”                   
              [answer-page 3].                                                                                                
                      The examiner also recognizes that Noguchi fails to teach the read/write signal                          
              processor being connected to the read/write amplifier by a plurality of lines.  Thus, the                       
              examiner turns to Kondo, wherein a signal processor 12 is connected to the amplifier 13                         
              by a plurality of lines, whereby the plurality of interleaved write data is transmitted between                 
              the amplifier and the signal processor by the plurality of lines, referring to Figure 1B.  The                  
              examiner then concludes that it would have been obvious to modify the                                           





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