Ex parte SAIKI et al. - Page 8




              Appeal No. 2000-0373                                                                                            
              Application No. 08/450,245                                                                                      

              U.S.C. § 103.                                                                                                   
                      With regard to independent claim 3, the examiner applies Precourt and Behrens                           
              against this claim.  More particularly, the examiner contends that Precourt discloses a write                   
              signal processor 10, 12 and a write amplifier 16 for recording data, with the write signal                      
              processor converting the write data into NRZI and wherein the write data is transmitted                         
              between the write amplifier and the write signal processor in the NRZI code.  The examiner                      
              refers to column 3, lines 40-68 and Figure 1 of Precourt.                                                       
                      Admitting that Precourt does not teach a read/write signal processor and a                              
              read/write amplifier, the examiner cites Behrens for such a teaching as well as converting                      
              write data into NRZI code, referring to Figure 1 and column 1, lines 28-43 of Behrens.                          
                      Finally, the examiner concludes that it would have been obvious to modify Precourt                      
              to include the teachings of Behrens because “it is well known in the art to use read/write                      
              amplifiers and read/write signal processors” because they “help to simplify the circuit                         
              construction, and save time and money” [answer-page 6].                                                         




                      Claim 3 requires that the read/write signal processor have a “conversion circuit for                    
              converting the write data into a Non-Return-To-Zero-Interleaved (NRZI) code, whereby the                        
              write data is transmitted between the read/write amplifier and the read/write signal                            
              processor in the NRZI code.”                                                                                    

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