Ex parte CLOKE - Page 3




          Appeal No. 2000-0379                                                        
          Application No. 08/815,352                                                  














          The following example, taken from page 5 of the specification,              
          demonstrates how errors during read-out of the data sync mark               
          and preceding (i.e., preamble) bits can result in false                     
          detection of the data sync mark:                                            


          Line 27 shows the sync word pattern, which occupies bit                     
          positions -08 to -00.  Line 28 shows the sync word pattern                  
          preceded by the expected "1" bits in bit positions -11 to -09.              
          Lines 29 and 30 show that if read errors occur in bit                       
          positions -11 and -04, the bits in positions -11 to -03 of the              
          read-out signal will be incorrectly detected to be the sync                 
          word pattern.  In order to reduce the chance of such an                     
          occurrence, Appellant uses a data sync mark write string which              


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