Appeal No. 2000-1587
Application 09/055,254
forming shallow trench isolation in semiconductor integrated
circuits, which overcomes the problem of “dishing effect” in
the trench areas. Dishing is generally caused by the long
time needed to etch back the thicker dielectric layer outside
the shallow trench and over-etching of the thinner layer over
the trench (specification, page 2). Thin layers of silicon
oxide and silicon nitride are formed over a substrate as a
hard mask through which shallow trenches are etched into the
substrate (specification, page 3). An oxide layer is formed
by high density plasma chemical vapor deposition (HDPCVD) to
fill in the trenches and cover the substrate. This oxide
layer has a higher thickness over larger substrate areas
compared to its smaller areas. The HDPCVD oxide layer is
covered with a spin-on-glass (SOG) layer and baked before
partial etching to remove the SOG outside the trenches
(specification, pages 4 & 5). A high-temperature curing of
the remaining SOG, which is left in the form of residue over
the trench area, further evaporates the solvent and makes the
SOG denser and harder. The denser SOG functions as a
protection mask for preventing the “dishing effect” in the
trench area during the subsequent etching step that removes
2
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