Appeal No. 2000-1991
Application No. 08/587,417
Shan et al. (Shan) 5,296,094 Mar. 22, 1994
Dahm et al. (Dahm) 5,431,778 Jul. 11, 1995
Fukunaga et al. 54-124986 Sep. 28, 1979
(Fukunaga)(JP)
Aoyama et al. 60-116146 Jun. 22, 1985
(Aoyama)(JP)
Wolf et al. (Wolf), “Silicon Processing for the VLSI Era,” Vol.
1, pp. 528-534 (1986).
Claims 1, 5-10, 12-18 and 20-25 stand rejected under
35 U.S.C. § 112, first paragraph, for lack of enablement.
Claims 1, 5-10, 12-18 and 20-25 stand rejected under
35 U.S.C. 112, second paragraph, for being vague and indefinite.
Claims 1, 5, 6, 9, 10, 12 and 20-25 stand rejected under
35 U.S.C. § 103(a) as being unpatentable over Aoyama.
Claim 8 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Aoyama and Wolf.
Claims 9, 10, and 23-25 stand rejected under 35 U.S.C.
§ 103(a) as being unpatentable over Aoyama and Fukunaga.
Claims 7, 13-16, 18, 20 and 21 stand rejected under
35 U.S.C. § 103(a) as being unpatentable over Aoyama, Fukunaga,
Chang, and Shan, or over Aoyama, Fukunaga and Dahm.
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