Appeal No. 2001-0149 Application 08/896,001 However, as pointed out by our reviewing court, we must first determine the scope of the claim. “[T]he name of the game is the claim.” In re Hiniker Co., 150 F.3d 1362, 1369, 47 USPQ2d 1523, 1529 (Fed. Cir. 1998). In addition, claims are to be interpreted as the terms reasonably allow. In re Zletz, 893 F.2d 319, 321, 13 USPQ2d 1320, 1322 (Fed. Cir. 1989). Independent claims 1, 7, 10, and 17 recite an “inter- connect chip associated with each logic device” designed to provide communication of information between logic devices in the same row or column. Taking a reasonably broad interpretation, claims 1, 7, 10, and 17 require the interconnect chip to provide communication of information between logic devices in the same row or column. Upon review, the Examiner has not shown that Winlow teaches an “interconnect chip associated with each logic device” designed to provide communication of information between logic devices in the same row or column as recited in claims 1, 7, 10, and 17. Winlow teaches a system comprising a plurality of programmable logic devices. However, the interconnection structure as disclosed in Winlow comprises only of programmable 6Page: Previous 1 2 3 4 5 6 7 8 9 NextLast modified: November 3, 2007