Appeal No. 2001-0294
Application No. 09/004,399
BACKGROUND
Appellants’ invention is directed to a method and apparatus
for braking a polyphase dc motor used in a hard disk drive. A
braking circuit is used to brake the motor when the motor has
slowed to an actual rotational speed (Specification, page 4).
The braking circuit compares the signal corresponding to the
motor speed with a clock signal from a clock generator
(specification, page 9). Thus, by determining the actual
velocity of the disk, braking of the motor will be timed to avoid
premature or postmature braking and damage to the heads
(specification, page 12).
Representative independent claim 1 is reproduced below:
1. A method for braking a polyphase dc motor,
comprising:
generating a speed signal indicating a spinning
velocity of the motor;
upon a loss of power that energizes the motor,
determining from the speed signal that the motor has slowed
at least to an actual predetermined spinning velocity;
and activating a tach braking circuit to brake the
motor by using clock pulses when the motor speed has been
determined to have reached said predetermined spinning
velocity.
2
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