Ex Parte YUZAWA et al - Page 2



          Appeal No. 1999-0260                                                        
          Application 08/571,064                                                      

          devices which have developed short circuits or otherwise consume            
          unexpected large amounts of power.                                          
               Appellants' primary embodiment (figure 1) provides a PC card           
          (60) connected to two separate voltages (Vcc and Vpp) through two           
          power lines (35 and 36) and PC card slot (50).  These power lines           
          are each separately monitored by resistors (41 and 42) and                  
          differential amplifiers (43 and 44).  The outputs of the                    
          amplifiers are supplied to a disjunctive circuit (OR-gate 39)               
          which outputs a logical sum of the two inputs as an over current            
          signal (OCS) to ON/OFF switch controllers (37 and 38).  Each                
          controller operates upon a separate switch (31 and 32) so that              
          power to both power lines is terminated upon detection of an                
          over-current condition in either resistor (41 or 42).                       
               In addition, the output of the disjunctive circuit is                  
          forwarded to a register (23) and a driver (25).  In response to a           
          high OCS signal that is accompanied by the over-current                     
          detection, the driver is placed into a high impedance state and             
          the transmission of bus signals to the PC card is halted.                   
               Independent claim 1 is reproduced as follows:                          
          1.  A power enabling mechanism, which controls supply of                    
          operating power from an information processing apparatus to a               
          detachable input/output device, said mechanism comprising:                  

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