Appeal No. 2000-0258 Page 6
Application No. 08/577,897
a teaching of "non-disruptively interconnecting peripheral device
from the host device by disabling the communication bus from the
system interconnects by tri-state buffers.” (See answer, page 3)
We find that Herrig discloses inhibiting the operation of
the bus in the period of time that a module is being inserted or
removed from a connector connected to the bus, and reactivates
the bus after the module has been inserted or removed. In the
removal of a module from its associated connector, a switch on
the module is operated to provide an inhibit signal to a control
circuit which inhibits operation of the bus (col. 1, lines 46-
53). The control circuit, in response to the inhibit signal,
seizes control of the bus and halts the clock signals which
control the operation of the bus, thus preventing any other
circuits from seizing or transmitting data on the bus (col. 2,
lines 5-9). This isolates the connected circuits from any
transients which may occur on the bus during insertion or removal
of a bus connected circuit board (col. 5, lines 1-4). Other
circuits can continue to perform functions which do not require
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