Appeal No. 2000-0258 Page 7
Application No. 08/577,897
find that in Herrig, the modules are isolated from the bus as a
result of seizure of the bus by the control circuit and halting
of the clock signals which control the operation of the bus.
Ady discloses (col. 5, lines 30-36) that "[a]lternatively,
the computer bus 29 need not be disabled and enabled by the
computer. Rather logic circuits, such as tri-state bi-
directional buffers located directly on the card header 10 may
enable and disable signals between the module 20 and the bus 29
in response to the switch 36, when the module is inserted and de-
inserted." From the disclosure of Ady, we find that a module may
be isolated from the computer bus 29 using tri-state bi-
directional buffers, as an alternative to the computer bus 29
being disabled by the computer. Although Ady teaches that
signals between the module 20 and the bus 29 are enabled and
disabled in response to switch 36, we find no teaching or
suggestion of having each of the modules isolate their circuitry
from the computer bus, but rather find that only the tri-state
bi-directional buffers located directly on the card header 10 of
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