Appeal No. 2001-0046
Application 08/971,014
BACKGROUND
Appellant’s invention is directed to a method for
fabricating contacts for formation of stacked capacitors in a
layered semiconductor structure such as a DRAM circuit. The
method includes forming a contact region in the semiconductor
material structure and forming a conductive layer in a cavity
characterized by a bottom portion formed of a first material and
sides formed of a second material (specification, page 3).
According to Appellant, higher etch depth may be achieved for
forming small holes in thick layers of oxide (id.).
Representative independent claim 1 is reproduced as follows:
1. A method for fabricating an integrated circuit,
comprising the steps of:
forming a contact region in a semiconductor material
structure;
covering said semiconductor material structure,
excluding said contact region, with a first material;
covering said first material and said contact region
with a layer of a second material;
removing portions of said layer of second material and
exposing said contact region, said removal of said portions
of said layer of second material and exposing said contact
region forming a cavity characterized by a bottom of an
upper portion being said first material and sides of said
upper portion being second material; and
forming a conductive layer in said cavity to contact
said contact region and conform to said bottom and sides.
2
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