Ex Parte BEGIS et al - Page 2




           Appeal No. 2001-0517                                                                  
           Application No. 08/586,611                                                            

           drive without a priori knowledge of its performance                                   
           characteristics.  That is, the claimed invention represents a new                     
           paradigm in optimizing computer system performance through                            
           dynamically benchmarking the hard drive resident within the                           
           system, thereby overcoming the inherent limitations commonly                          
           associated with the old paradigm of the prior art wherein a                           
           priori performance information of the hard drive was required.                        
           Accordingly, the claimed invention liberates circuit board                            
           vendors from the time and expense associated with offering a                          
           plurality of boards each of which is designed to optimally                            
           interface with a specific hard drive.  A further illustration of                      
           the invention is obtained from the following claim.                                   
                 8. A computer system comprising a processor, a hard drive                       
           and a function, wherein, when executed by the processor, the                          
           function determines an optimal access block size of the hard                          
           drive by benchmarking accesses to the hard drive for a plurality                      
           of benchmarking access block sizes in accordance with a set of                        
           benchmarking parameters.                                                              
                 The examiner relies on the following references:                                
           Osterlund                   5,034,914              Jul. 23, 1991                      
           Martins et al. (Martins), “ARQ Protocols with Adaptive Block Size                     
           Perform Better Over a Wide Range of Bit Error Rates,” IEEE, Vol.                      
           38, No. 6, pages 737-739, 1990.                                                       
           Choudhary et al. (Choudhary), “Experimental Evaluation of                             
           Multilevel Caches for Shared Memory Multiprocessors,” IEEE, pages                     
           409-420, 1991.                                                                        


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