Appeal No. 2001-1093
Application No. 09/252,186
disclose a metal silicide liner on the metal features and the
vias of a semiconductor device (brief, page 8; answer, page 5).
According to the examiner (answer, page 6), “Ahn teaches in
figure 10 a plurality of patterned metal layers comprising
aluminum, copper or an alloy thereof (column 4, line 65)
containing metal features and vias (column 1, lines 23-28), and
air gaps 56, substantially continuous throughout the
interconnection system, between the patterned metal layers, metal
features and vias, and a conductive liner 44, 52 used as an
adhesion promoter layer (column 4, lines 60-62) substantially
enveloping metal features and vias,” and “Ho [’214] teaches in
figure 2e a conductive liner 200, 208 being an adhesion promoter
layer (column 4, lines 27-29) and comprising tungsten silicide
(column 7, line 44) of thickness between 500 to 1000 A, on and
around interconnect structures 210.” Based upon the teachings of
Ahn and Ho, the examiner is of the opinion (answer, pages 5 and
6) that:
It would have been obvious to a person of ordinary
skill in the art at the time the invention was made to
form a metal silicide liner on the metal features and
the vias in Hause et al.’s device in order to enhance
the conductivity of the device, improve the reliability
of the device and to prevent the formation of open
circuits and short circuits during the etching process
of making the device. The combination is motivated by
the teachings of Ahn who points out the advantages of
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