Appeal No. 2001-1509
Application No. 08/871,890
having solder bumps, including an outer layer pad group and an
inner layer pad group, are planarly arranged on an outermost
surface of the multilayer wiring layers. The outer layer pad
group includes solder pads, located in at least two and up to
five rows from an outer position of the outer layer group, having
flat pads connected to a conductor pattern on the outermost
surface of the wiring layers. Solder pads of the inner layer pad
group are connected to via holes connected to flat pads located
on a first inner layer and at least one further inner layer of
the multilayer wiring layers.
Claim 5 is illustrative of the invention and reads as
follows:
5. A multilayer printed circuit board, comprising:
a core substrate;
multilayer wiring layers formed on the core substrate
by alternately laminating interlaminar insulating layer and
conductor pattern;
a group of solder pads having solder bumps planarly
arranged on an outermost surface of the multilayer wiring
layers, the group of solder pads including an outer layer
pad group and an inner layer pad group;
wherein the outer layer pad group includes solder pads
located in at least two and up to five rows from an outer
position of the solder pad group having flat pads each
connected to an outermost conductor pattern located on the
outermost surface and having solder bumps formed on surfaces
of the solder pads;
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