Appeal No. 2001-1874
Application No. 09/072,758
Figure 2.1 That Brajovic may disclose, as appellant argues, circuitry that counts events
or detects changes in histogram patterns -- subsequent to the processing of
photocurrent at photodiode 12 -- is essentially irrelevant in view of the scope of instant
claim 14.
Claims 15 and 18, Section 103 rejection over Aizawa and Kawahito
Appellant’s argument in support of claims 15 and 18 (Brief at 13-15), other than
the alleged deficiencies in Aizawa that we have found to be unpersuasive, is the
asserted lack of suggestion or motivation in either reference of compression responsive
to continuous time processing.
Appellant’s position appears to presuppose that Aizawa lacks continuous time
processing -- a postulate that we find untenable. In any event, we agree with the
examiner’s position set out in the Answer. Moreover, the compression engine taught by
Kawahito is for compressing image data prior to storage. The compression engine
would have no data to compress, absent completion of processing of the image signal
by the ISA, or upon “a result” of continuous time processing within the ISA, as recited in
instant claim 15.
Being unpersuaded of error in the rejection, we sustain the Section 103 rejection
of claims 15 and 18 over Aizawa and Kawahito.
1 Brajovic describes an alternative embodiment (Fig. 4) that includes a shutter 4 for enabling
discrete sampling periods. Col. 10, ll. 11-40.
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