Ex Parte TWU et al - Page 1




               The opinion in support of the decision being entered today was not     
               written for publication and is not binding precedent of the Board.     
                                                               Paper No. 12           
                      UNITED STATES PATENT AND TRADEMARK OFFICE                       
                                    ____________                                      
                         BEFORE THE BOARD OF PATENT APPEALS                           
                                  AND INTERFERENCES                                   
                                    ____________                                      
              Ex parte JIH-CHURNG TWU, SYUN-MING JANG, and CHEN-HUA YU                
                                    ____________                                      
                                Appeal No. 2002-0102                                  
                             Application No. 09/298,879                               
                                    ____________                                      
                                      ON BRIEF                                        
                                    ____________                                      
          Before KIMLIN, LIEBERMAN, and POTEATE, Administrative Patent                
          Judges.                                                                     
          POTEATE, Administrative Patent Judge.                                       


                                 DECISION ON APPEAL                                   

               This is an appeal under 35 U.S.C. § 134 from the examiner's            
          refusal to allow claims 1-8, 10-15 and 18-22, which are all of              
          the claims pending in the application.                                      
               Claim 1 is representative of the subject matter on appeal              
          and is reproduced below:                                                    
          1.  The method of simultaneously forming both a high voltage and            
          a low voltage transistor in the manufacture of an integrated                
          circuit comprising:                                                         
               providing a semiconductor substrate wherein active areas of            
          said substrate are isolated from other active areas and wherein             
          there is at least one low voltage area in which said low voltage            
          transistor will be formed and at least one high voltage area in             






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