Appeal No. 2002-0102
Application No. 09/298,879
which said high voltage transistor will be formed wherein said
high voltage transistor as a voltage higher than said low voltage
transistor;
first wet oxidizing the surface of said semiconductor
substrate to form a first layer of gate oxide on the surface of
said semiconductor substrate in said active areas;
covering said low voltage active area with a mask;
second wet oxidizing the surface of said semiconductor
substrate where it is not covered by said mask to form a second
layer of gate oxide underlying said first gate oxide layer in
said high voltage active area wherein said second wet oxidizing
comprises H2 and O2 in a N2 atmosphere in the ratio of H2 : O2 : N2
of 1 : 2 : more than 20;
thereafter removing said mask;
depositing a layer of polysilicon overlying said first gate
oxide layer in said low voltage active area and overlying said
first and second gate oxide layers in said high voltage active
area; and
patterning said polysilicon layer to form gate electrodes
for said low voltage and said high voltage transistors in the
fabrication of said integrated circuit.
The references relied upon by the examiner are:
Pong et al. (Pong) 5,210,056 May 11, 1993
Lin 5,502,009 Mar. 26, 1996
Sun et al. (Sun) 5,920,779 Jul. 6, 1999
El-Diwany 5,953,599 Sep. 14, 1999
Grounds of Rejection
1. Claims 1-5, 8, 11-14 and 18-22 stand rejected under
35 U.S.C. § 103 as unpatentable over El-Diwany and Lin and
further in view of Pong.
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