Appeal No. 2002-0321
Application No. 09/014,729
Appellants' claimed invention is directed to a method of
fabricating an electronic device on a semiconductor substrate.
The method comprises forming the following consecutive layers on
a gate insulator: (1) a silicon-containing layer, (2) a layer of
titanium and nitride, (3) a tungsten layer, and (4) a silicon and
nitride layer. Each of the layers are consecutively etched
including, finally, the exposed portion of the silicon-containing
layer. According to appellants, "[a]n advantage of the invention
is providing a highly selective etch that allows for long
overetches necessary for severe wafer topography" (page 2 of
Brief, third paragraph).
Appealed claims 10-15 stand rejected under 35 U.S.C. § 103
as being unpatentable over Agnello in view of Wu. Claims 16 and
17 stand rejected under 35 U.S.C. § 103 as being unpatentable
over the stated combination of references further in view of
Autryve.
We have thoroughly reviewed the respective positions
advanced by appellants and the examiner. In so doing, it is our
judgment that the examiner has failed to establish a prima facie
case of obviousness for the claimed subject matter. Accordingly,
for essentially those reasons expressed by appellants, we will
not sustain the examiner's rejections.
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