Appeal No. 2002-0489
Application 08/831,731
external to the video decoder, such as a standalone external
video decoder (Br17). It is argued that the examiner fails to
provide any objective reason to combine the references (Br17).
It is argued that the examiner's ignores that any need to
generate a burst gate signal is already met by the prior art
technique of generating a traditional burst gate signal (Br17).
The examiner responds by citing In re McLaughlin,
443 F.2d 1392, 170 USPQ 209 (CCPA 1971).
The examiner's response is not helpful. Unlike claim 1,
which claims an intended use for the horizontal sync pulse (to
simulate an "external burst gate signal") output from the
decoder, claim 16 recites "counter circuitry externally coupled
to said video decoder for generating and providing a simulated
external burst gate signal by counting cycles of the pixel clock
after the programmable decoded horizontal sync pulse." Thus, the
rejection must deal with this external counter circuitry for
generating a burst gate signal. The examiner relies on the
horizontal sync signal HS in Philips as the claimed "programmable
decoded horizontal sync pulse" and as the "simulated external
burst gate signal" (FR18-19). However, claim 16 requires the
"simulated external burst gate signal" to be generated by the
counter circuitry counting cycles after the programmable
horizontal sync pulse; it is not the horizontal sync pulse. For
this reason, the rejection is confusing. The examiner also finds
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