Appeal No. 2002-0489
Application 08/831,731
that Burrows teaches generating a burst gate pulse by timing an
interval from either the leading or trailing edge of the
horizontal synchronization pulse (FR20). Thus, the examiner
relies on the background description of Burrows rather than the
invention in Burrows. We agree that Burrows teaches generating a
burst gate signal by counting cycles after a horizontal sync
pulse. However, the rejection never really comes to grips with
the limitations of the counter circuitry external to the video
decoder and using cycles of the pixel clock from the video
decoder. Although the examiner states that the external counter
circuitry would have been obvious for "the benefit[s] of
versatil[ity] and flexibility" (FR20), we do not find any
suggestion for this in Burrows. It is not explained why the
video decoder would require an external burst gate signal. We
conclude that the examiner has failed to establish a prima facie
case of obviousness. The rejection of claims 16-18, 20, 21, 23,
and 27-29, 40-43, and 53 over Philips and Burrows is reversed.
The references MC141622, MC44144, Rogers, Romesburg, and Brown,
applied to various dependent claims, do not overcome the
deficiencies of Philips and Burrows. Accordingly, the rejections
of claims 19, 22, 24-26, and 54-57 are reversed.
Although appellant does not address the rejection of
claim 16 over Philips, Burrows, and Rogers (FR36-39), we conclude
that Rogers does not overcome the deficiencies of Philips and
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