Ex Parte AZADEGAN - Page 5




           Appeal No. 2002-1632                                                                      
           Application No. 08/941,785                                                                


           determining a difference bit (id.).  In particular, the Examiner                          
           asserts that “a reference bit (i.e. MODE bit from input 103)                              
           designates whether the coding is based on a normal mode (i.e.                             
           macroblock intra coding) or interframe coding mode” (answer,                              
           pages 5 & 6).                                                                             
                 A rejection for anticipation under section 102 requires that                        
           the four corners of a single prior art document describe every                            
           element of the claimed invention, either expressly or inherently,                         
           such that a person of ordinary skill in the art could practice                            
           the invention without undue experimentation.  See Atlas Powder                            
           Co. v. Ireco Inc., 190 F.3d 1342, 1347, 51 USPQ2d 1943, 1947                              
           (Fed. Cir. 1999); In re Paulsen, 30 F.3d 1475, 1478-79, 31 USPQ2d                         
           1671, 1673 (Fed. Cir. 1994).                                                              
                 After a review of Fujii, we agree with Appellant’s assertion                        
           that the claimed encoding the selected macroblock based on the                            
           difference determined between a selected macroblock and an                                
           adjacent macroblock and assigning a difference bit, are absent in                         
           the reference.  Fujii relates to correcting errors of reproduced                          
           images and constructing images which cannot be corrected (col. 2,                         
           lines 9-16).  The encoding circuit relied on by the Examiner                              
           (element 7 in Figure 2) is a part of the circuit used for error                           
           correction (col. 3, lines 44-50).  As depicted in figure 7, if                            

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